Module Description:
This course focuses on the design of the CPU and computer system at the architectural (or functional) level: CPU instruction sets and functional units, data types, control unit design, interrupt handling and DMA, I/O support, memory hierarchy, virtual memory, and buses and bus timing. Introduction to digital systems: What constitutes a general-purpose computer; design of a minimal hardwired CPU. Assembly level machine organization: System buses, timing, arbitration, and bus protocol; the general fetch-execute cycle with interrupts; multiple bus systems. Memory system organization & architecture: Memory design and hierarchy; alignment; L1 and L2 caches; paging and virtual memory. Interfacing, communication External storage devices: magnetic and optical. Buffering of I/O, polling, interrupt-driven I/O, interrupt-driven I/O with DMA. Functional organization: integer and floating-point units, CPU instruction sets and addressing modes, RISC; CISC, long instruction word RISC processors, use of multiple functional units, pipelining.
Module Aims:
This course focuses on the design of the CPU and computer system at the architectural level.
Learning Outcomes:
· Understand all the basic concepts of information technology and its related terminologies.
· The ability to search through the Internet effectively.
· The ability to fully utilize an e/mail service
· Knowledge of e/learning and distance education systems and how they work and their benefits
· This course requires the student to demonstrate the following
· Apply the factors that contribute to computer performance
· Identify the characteristics of CISCS, RISC, and VLIW processors.
· Analyze multilevel caches systems
· Analyze the effect of memory and memory hierarchy on performance.
· Analyze Input/output systems.
· Identify the characteristics of multicore, multiprocessors, and clusters
Textbook:
William Stallings, Computer Organization and Architecture (6th edition) Hennessy / Patterson, Computer Architecture: A Quantitative Approach